PIC18F6410-I/PT【PDF 82/411 页】IC PIC MCU FLASH 8KX16 64TQFP

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Sheet目录3840

78页 79页 80页 81页 [82页]83页 84页 85页 86页

PIC18F66K80 FAMILY

DS39977F-page 172

2010-2012 Microchip Technology Inc.

REGISTER 11-1:

PADCFG1: PAD CONFIGURATION REGISTER

R/W-0

U-0

R/W-0

RDPU(1)

REPU(1)

RFPU(2)

RGPU(2)

—

CTMUDS

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

RDPU:

PORTD Pull-up Enable bit(1)

= PORTD pull-up resistors are enabled by individual port latch values

= All PORTD pull-up resistors are disabled

bit 6

REPU:

PORTE Pull-up Enable bit(1)

= PORTE pull-up resistors are enabled by individual port latch values

= All PORTE pull-up resistors are disabled

bit 5

RFPU:

PORTF Pull-up Enable bit(2)

= PORTF pull-up resistors are enabled by individual port latch values

= All PORTF pull-up resistors are disabled

bit 4

RGPU:

PORTG Pull-up Enable bit(2)

= PORTG pull-up resistors are enabled by individual port latch values

= All PORTG pull-up resistors are disabled

bit 3-1

Unimplemented:

Read as ‘0’

bit 0

CTMUDS:

CTMU Comparator Data Select bit

= External comparator (with output on pin CTDIN) is used for CTMU compares

= Internal comparator (CMP2) is used for CTMU compares

Note 1:

These bits are unimplemented on 28-pin devices.

These bits are unimplemented on 40-pin devices.

REGISTER 11-2:

WPUB: WEAK PULL-UP PORTB ENABLE REGISTER

R/W-x

WPUB7

WPUB6

WPUB5

WPUB4

WPUB3

WPUB2

WPUB1

WPUB0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-0

WPUB<7:0>:

Weak Pull-Up Enable Register bits

= Pull-up is enabled on corresponding PORTB pin when RBPU = 0 and the pin is an input

= Pull-up is disabled on corresponding PORTB pin

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